Обязанности и достижения:
Technical Profile:
◦ Hardware design and development using Verilog/VHDL.
◦ FPGA programming
◦ Static Timing Analysis (STA)
◦ Formal library modeling
Managerial roles:
◦ Interaction with customers: problem statement, product status discussion (existing/needed
documentation, expectation, ...)
◦ Interaction with team: consult, progress tracking and reporting to customer.
Training
◦ Digital design, Verilog, FPGA, STA.
Remodel different FPGA vendor simulation libraries to Formal Library.
Implement FPGA Design Library Clock macros for customer technology specific 3D
FPGA.